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Jet Propulsion Laboratory Electronics Engineer IV, Power Electronics Technology & Engineering Group in Pasadena, California

Job Details

New ideas are all around us, but only a few will change the world. That’s our focus at JPL. We ask the biggest questions, then search the universe for answers—literally. We build upon ideas that have guided generations, then share our discoveries to inspire generations to come. Your mission—your opportunity—is to seek out the answers that bring us one step closer. If you’re driven to discover, create, and inspire something that lasts a lifetime and beyond, you’re ready for JPL.

Located in Pasadena, California, JPL has a campus-like environment situated on 177 acres in the foothills of the San Gabriel Mountains and offers a work environment unlike any other: we inspire passion, foster innovation, build collaboration, and reward excellence.

JPL’s Power and Sensor Systems Section leads the research and development and flight applications of power systems, power electronics, power sources, energy storage, energy conversion, and related sensor systems at JPL. The Power Electronics Technology and Engineering group within the section is dedicated to the development of power subsystem electronics concepts, implementation of power system architecture designs, design and implementation of hardware for flight projects, and support for proposal development and project formulation. Currently we are seeking an Electronics Engineer to participate in the development and testing of the next generation of space power hardware.

As an Engineer in this group, you will lead teams designing and testing electronics subsystems and support equipment and will be involved in all aspects of power electronics development from concept to delivery. You will work closely with Power Electronics Cognizant Engineers, Senior Design Engineers, Systems Engineers, and the Technical Group Supervisors.

In this position you will:

  • Lead the development of power electronics systems, guiding architectural and design choices, understanding systems needs and insuring suitability of the design for the application.

  • Lead teams responsible for design, analysis, fabrication, and test of power electronics systems, often in collaboration with other groups, both at JPL and at contractors.

  • Work with other specialists to solve technical problems as they arise, both during the initial design stage and during laboratory testing.

  • Develop engineering documentation, such as test procedures, analyses, engineering drawings, and review products, including presentations.

  • Work effectively with section and project management to present and status progress on power electronics systems.

  • Understand and ensure that appropriate procedures are followed when delivering flight hardware.

Qualifications include:

  • Bachelor’s degree in Electrical Engineering, or related technical subject area with typically a minimum of 9 years of related experience, or Master’s degree in similar disciplines with typically a minimum of 7 years of experience, or Ph.D. in similar disciplines with typically a minimum of 5 years of experience.

  • Experience leading teams designing, testing, and delivering electronic systems.

  • Experience with Bench Top Test Equipment, including DMMs, high current power supplies, electronic loads, various measurement probes and oscilloscopes.

  • Experience in the design, development, fabrication, assembly and test of power electronics or analog hardware, particularly focused on power systems and analog electronics in space environments.

  • Experience in the use of computer aided engineering tools to support the electronics design process.

  • Knowledge of software for computation and simulations associated with electronics development and/or test.

  • Good oral and written communications skills.

Preferred Skills:

  • Validated ability to multi-task with an established track record of meeting schedule landmarks.

  • Familiarity with JPL and NASA policies and procedures applicable to the development of space qualified hardware.

  • Ability to lead testing and debugging of circuits in the lab.

  • Experience with National Instruments test software and hardware, particularly using LabView and LabView-compatible test equipment.

  • Experience with LTSpice for simulation and Altium for schematic capture and PWB layout.

JPL is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to sex, race, color, religion, national origin, citizenship, ancestry, age, marital status, physical or mental disability, medical condition, genetic information, pregnancy or perceived pregnancy, gender, gender identity, gender expression, sexual orientation, protected military or veteran status or any other characteristic or condition protected by Federal, state or local law.

In addition, JPL is a VEVRAA Federal Contractor.

EEO is the Law. (https://www.dol.gov/agencies/ofccp/posters)

EEO is the Law Supplement

Pay Transparency Nondiscrimination Provision (https://www.dol.gov/sites/dolgov/files/ofccp/pdf/pay-transp_English_unformattedESQA508c.pdf)

The Jet Propulsion Laboratory is a federal facility. Due to rules imposed by NASA, JPL will not accept applications from citizens of designated countries or those born in a designated country unless they are Legal Permanent Residents of the U.S or have other protected status under 8 U.S.C. 1324b(a)(3). The Designated Countries List is available here. (https://www.nasa.gov/sites/default/files/atoms/files/designated_country_list_8-16-2019_tagged_0.pdf)

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