Job Information
Power Integrations Senior Test Engineer in San Jose, California
Job Description
Designs, develops and implements cost-effective methods of testing and troubleshooting analog and mixed-signal power management semiconductor products.
Responsible for developing test solutions for wafer sort and final test.
Prepares test and diagnostic programs, designs test fixtures and equipment and completes the required specifications and procedures for new product development.
Work with design/DFT/product engineering teams to define ATE test strategy and specifications.
Work with manufacturing sites to ensure a smooth production ramp, sustaining and continuous improvement of production test.
Experience:
A minimum of 5 years of semiconductor Test Engineering experience with analog-mixed signal products, DFT and test plan responsibility, production support, and new product introduction experience.
Knowledge of C/C++ is required.
Extensive Teradyne Eagle ETS-88 or ETS-364 experience.
Ability to work within a cross functional development team
Strong test development and debug skills on ETS-88 or ETS-364 ATE platform.
Proficient with schematic and hardware design
Pay: Up to $165K annual base salary commensurate with experience.